Thesis Title: Design and Implementation of Reliable Hardware Security Primitives in Nano-Scale Circuits

Past Qualification: M.Tech from SMVDU Katra, J&K India

Fellowship: PMRF, Govt. of India

Status: Defended on 22 August 2024

Current Affiliation: Postdoctoral Fellow, Ruhr-Universität Bochum, Germany

Qualification: M.Tech from MMMUT Gorakhpur, UP India

Fellowship: MoE, Govt of India

Thesis Title: Design Techniques for Reliable and Radiation Tolerant Low Power Circuits

Status: Thesis Submitted (December 2025)

Qualification: M.Tech from Sathyabama Deemed University Chennai, TN India

Fellowship: Off-campus Candidate

Organization: ISTRAC-ISRO Bangalore

Research Topic: FPGA-based Physically Unclonable Functions

Status: Ongoing (Since September 2021)

Qualification: M.E. from Punjab University, Punjab, India

Fellowship: MoE, Govt of India

Research Topic: Mixed-signal Circuits for Biomedical Applications

Status: Ongoing (Since August 2023)

Qualification: M.E. from Punjab University, Punjab, India

Fellowship: C2S, MeitY, Govt. of India

Research Topic: Mixed-signal Circuits for Biomedical Applications

Status: Ongoing (Since January 2024)

Qualification: M.Tech from UIET, Panjab University, Chandigarh, India

Fellowship: Visvesvaraya PhD Scheme

Research Topic: In-memory Computing Architectures

Status: Ongoing (Since January 2024)

Qualification: M.Tech from Panjab University, Patiala, India

Fellowship: C2S MeitY, Govt. of India

Research Topic: Machine Learning Attack Resilient Hardware Security Primitives

Status: Ongoing (Since August 2024)

Fellowship: MoE, Govt. of India

Qualification: M.Tech from SLIET Longowal, India

Research Topic: Pacing Analog Front End for Pacemaker Chip

Status: Ongoing (Since January 2026)