Expert Talks

Expert Talks (31)

• Invited Talk on “Hardware Security Primitives for Smart Computing Devices" during Analog Devices India (ADI) Innovation Day 2024 conducted on 26th September 2024 at Analog Devices Bangalore. 

• Talk on “Integrated Circuit Reliability and Quality: Challenges, Opportunities, and Roadmap" at Fourth Training School on “Environmental Cyber-Physical Systems” organized by Indian Institute of Technology Indore during 28- 30 June, 2024.

• Talk on “Integrated Circuit Reliability and Quality: Challenges, Opportunities, and Roadmap" at One-week Faculty Development Program on “Recent Trends in VLSI and MEMS” organized by Indian Institute of Information Technology Kottayam during 03 - 07 June, 2024.

• Talk on “Low Power Electronic Circuits for Biomedical Applications" at Oneweek Online Faculty Development Program on “Recent Trends in Nanoelectronics for Healthcare Applications” organized by ICFAI Foundation for Higher Education Hyderabad during 08 - 12 April, 2024.

• Talk on “Integrated Circuit Reliability and Quality: Challenges, Opportunities, and Roadmap" at One-week High-End Workshop (Karyashala) on “Hands-on Workshop on VLSI Circuits and Systems using Xilinx and Cadence Tools” organized by Indian Institute of Information Technology Una during 16 - 22 March, 2024.

• Talk on “Integrated Circuit Reliability and Quality: Challenges, Opportunities, and Roadmap" at One-week ATAL-Faculty Development Program on “Design and Simulation of next-generation Semiconductor Devices and its Application for Bio-Sensing” organized by IES, IPS Academy Indore during 02 - 06 January, 2024.

• Talk on “VLSI for AI and AI for VLSI: Trends, Challenges, and Opportunities" organized by PIEMR Indore on 04 January 2024.

• Talk on “Hardware Security Primitives for Smart Computing Devices" at One-week STTP on “Recent Advancements in VLSI Design and its applications (RAVDA-2023)” organized by IIIT Una during 04 - 08 July, 2023.

• Panalist in Panel Discussion on “Strategic Insights: Product Development and Commercialization" organized by Research and Development Cell, VIT Bhopal University on 06 July 2023.

• Talk on “Hardware Security for Edge AI computing" at 4th National Conference on IoT, Machine Learning, Artificial Intelligence and its Applications (NCRIMA 2023), organized by ECE Department, Sage University Bhopal during 24 - 25 April,  2023.

• Talk on “Hardware Security Primitives for Smart Computing Devices" at One-week High-End Workshop on “Advances in Nanoscale Transistors for Next-Generation Applications” organized by EEE Department, ABVIIITM Gwalior during 27 February - 05 March,  2023.

• Talk on “Integrated Circuit Reliability and Quality: Challenges, Opportunities, and Roadmap" at One-week High-End Workshop on “Advances in Nanoscale Transistors for Next-Generation Applications” organized by EEE Department, ABV-IIITM Gwalior during 27 February - 05 March, 2023.

• Talk on “Hardware Security Primitives for Smart Computing Devices" at Indo-Slovenia Joint Workshop on Electronics and Computer Engineering organized by IIT Indore on 20 February 2023.

• Talk on “Integrated Circuit Reliability, Security and Quality (IC ResQ): Challenges, Opportunities, and Roadmap" organized by VIT Bhopal University on 14 February 2023.

• Talk on “Integrated Circuit Reliability, Security and Quality (IC ResQ): Challenges, Opportunities, and Roadmap" organized by IEEE CASS Student Branch Chapter, IIT Indore on 13 February 2023.

• Talk on “Electronics and VLSI Design: Trends, Challenges, and Opportunities" organized by PIEMR Indore on 29 September 2022. 

• Talk on “Hardware Security Primitives" at One week STC on “Nanoelectronics Devices and Circuits Design” organized by NITTTR Chandigarh during 22 - 26 August 2022. 

• Panelist in Panel Discussion on “Challenges and Opportunities in Fabless and Fab Semiconductor Ecosystem in MP" at Conclave on “Fabless and Fab Semiconductor Ecosystem” under MPVS-2021 organized by IIT Indore during December 23-24, 2021 

• Talk on “Integrated Circuit Reliability, Security and Quality (IC ResQ): Challenges, Opportunities, and Roadmap" at One-week ATAL FDP on “Cyber Security” organized by ETC Department, IET-DAVV Indore during August 24-28, 2021 

• Talk on “Reliability Issues in VLSI Circuits and Systems" at 1st Train ing School/Workshop on “Environmental Cyber-Physical Systems (E CPS)” organized by Indo -South Korea Joint Network Center (JNC), IIT Indore during August 23-27, 2021 

• Talk on “Impact of Reliability Issues in VLSI Circuits and Systems" at One week ATAL FDP on “Reliability and Security of VLSI Circuits & Systems for IoT” organized by EE Department, IIT Jammu during August 02-06, 2021 

• Talk on “Hardware Security Primitives exploiting randomness in emerging SoC" at One-week ATAL FDP on “Reliability and Security of VLSI Circuits & Systems for IoT” organized by EE Department, IIT Jammu during August 02-06, 2021 

• Talk on “Reliability and security issues in VLSI circuits and systems" at One week ATAL FDP on “Latest Technological Developments for System on Chip (SoC) Applications” organized by ECE Department, SoET, GIET University, Gunupur, Odisha during July 26-30, 2021 

• Talk on “Reliability and security issues in VLSI circuits and systems" at One-week STTP on “Emerging Nanoscale Devices, Circuits and Its Applications” organized by ECE Department, Delhi Technological University, Delhi during May 10-14, 2021 

• Talk on “Reliability Issues and their Impact in VLSI Circuits" at One week STC on “Low Power VLSI Design” organized by NITTTR Chandigarh during 5 - 9 April 2021. 

• Talk on “Reliability Issues and their Impact in VLSI Circuits" at One week STC on “VLSI Design Challenges and Opportunities” organized by NITTTR Chandigarh during 21 - 25 September 2020. 

• Talk on “Reliability Issues and Modeling in Advanced Semiconductor Devices" at AICTE sponsored online STTP on “Advanced VLSI Design and Application using CADENCE EDA Tools", with the theme “Design and Simulation of Semiconductor Devices" organized by ABES Engineering College, Ghaziabad during 19 - 24 October 2020. 

• Talk on “Reliability Issues and their Impact in VLSI Circuits" at AICTE sponsored online STTP on “Advanced VLSI Design and Application using CADENCE EDA Tools", with the theme “Analog Integrated Circuit Design" organized by ABES Engineering College, Ghaziabad during 27 July – 01 August 2020. 

• Talk on “Reliability Issues in Automotive Electronics" at AICTE one week STTP on “Automotive Technology for a Sustainable Future” organized by GRIET, Hyderabad during 05-10 October 2020. 

• Talk on “Reliable VLSI Circuit Designs: Various reliability issues perspective" at “12th Technical Webinar" organized by “VIT Bhopal University, Bhopal" on 10 June 2020. 

• Talk on “Bias Temperature Instability Aware and Soft-error Resilient Circuit Designs" at FDP on “Recent Trends in VLSI" organized by GRIET, Hyderabad during 02-07 June 2020